Implementation of parallel AES Processing with CAM-based Massive-parallel SIMD Matrix Core

Abstract

Recently, several multimedia applications, such as digital image compression, digital video compression, and digital audio processing, are executed on the mobile devices. The processing core in the mobile device requires high performance, versatility, and programmability. Generally, multimedia applications consist of repeated arithmetic operation and table-lookup coding operation. To have high performance, versatility, and programmability by improving the processing speed of the both operations on a processing core, Content Addressable Memory-based massive-parallel SIMD matrix core (CAMX) is proposed. The role of CAMX is an accelerator for mobile CPU core. CAMX has highly parallel processing capability and is configured by two CAM modules which are used in fast table-lookup coding operation. This paper has shown the result of AES encryption. The number of AES encryption total clock cycles are 1,362,699, and also the detail number of clock cycles is confirmed: SubBytes is 1,312,160, ShiftRows and MixColumns is 17,161 in total, AddRoundKey is 2,519. Furthermore, CAMX can process AES encryption in 83.17 clock cycles / bytes, and it is confirmed to be about 50 % performance improvement than existing mobile processor.