Implementation of nonlocal non-Fourier heat transfer for semiconductor nanostructures

Abstract

The study of heat transport in micro/nanoscale structures due to their application, especially in Nanoelectronics, is a matter of interest. In other words, the precise simulation of the temperature distribution inside the transistors is consequential in designing and building more reliable devices reaching lower maximum temperatures during the operation. The present study constitutes a framework for micro/nanoscale heat transport study, which leads to calculating accurate temperature/heat flux profiles with low computational cost. The newly non-dimensional parameter γ, presenting the strength of the nonlocality, is utilized through the nonlocal DPL modeling (NDPL). Alongside calculating the nonlocality coefficient, the factors appearing in DPL, including the temperature jump and phase lagging ratio, are revisited. The factor γ is found to have a linear relationship with Knudsen (Kn) number, being 3.5 for Kn=10 and 0.035 for Kn=0.1. Although the nonlocality is bold for the large Knudsen numbers, it also plays a vital role for low Knudsen number structures, especially at earlier times. Further, It is obtained that intruding γ is critical for obtaining accurate temperature and heat flux distributions that are very close to the practical results of the Phonon Boltzmann equation.