Abstract
AbstractThe progress in the field of digital signal processing leads to the development of digital multirate techniques. Due to the fact that every single part of the whole system is processed with a minimum sample rate these techniques result in a very advantageous realization of a digital system with respect to the required processing time. In this paper a systematic procedure is shown leading to an efficient implementation of such multirate systems by digital signal processors. With the introduction of appropriate measures it is possible to make statements about the efficiency of the implementation with respect to the available arithmetical capacity of the signal processor. The presented method is demonstrated by the example of the implementation of a voice frequency telegraph FSK‐modem by a digital signal processor.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
