Implementation of Multiple Precision Sparse Matrix-vector Multiplication on CUDA using ELLPACK Format

Abstract

In this paper, we implement sparse matrix-vector multiplication (SpMV) kernels in the ELLPACK format on graphics processing units using arithmetic libraries supporting multiple precision on CUDA. We evaluate the performance of the developed kernels and also provide an optimized SpMV implementation in which multiple precision floating-point operations are split into several parts, each of which is executed as a separate kernel. Experimental evaluation with various matrices from real-world applications and at various levels of numeric precision shows that, in many cases, the optimized multiple precision SpMV performs better than the other implementations considered.