Implementation of Low Voltage MOSFET and Power LDMOS on InGaAs

Manoj Singh Adhikari,Raju Patel,Yogesh Kumar Verma,Yashvir Singh

doi:10.1007/s12633-021-01157-6

Manoj Singh Adhikari, Raju Patel + Show 2 more

Open Access

https://doi.org/10.1007/s12633-021-01157-6

Copy DOI

Abstract

In this paper, a new low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) have been proposed with concept of integration based on trench technology on InGaAs material. Junction isolation technique is used for the implementation of a low voltage MOSFET and a high power dual gate MOSFET in same InGaAs epitaxial layer side by side. The HV DG MOSFET consists of dual gate that are placed in drift region under the oxide-filled trenches. The proposed structure minimize on-resistance (Ron) along with increased breakdown voltage (Vbr) due to enhanced RESURF effect, the creation of dual channels, and due to folding technique of drift region in vertical direction. In the HV DG MOSFET, the drain current (ID) increases leading to enhanced transconductance (gm) by simultaneous conduction of channels with improved maximum oscillation frequency (fmax) and cut-off frequency (ft). On the other side, the low voltage MOSFET consists of a gate placed in a centre of the structure within an oxide trench to create two n-channels in the p-base. The two channels are conducting in parallel and give substantial enhancement in peak gm, ID, fmax and ft with more control over the short channel parameters. The design and performance analysis of low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) are carried out on 2-D ATLAS device simulator.

Highlights

The low voltage analog and digital circuits are integrated with power devices results in the development of smart power integrated circuits (PICs)
A new low voltage MOSFET (LV MOSFET) and high voltage dual-gate MOSFET (HV DG MOSFET) have been proposed with concept of integration based on trench technology on InGaAs material
Junction isolation technique is used for the implementation of a low voltage MOSFET and a high power dual gate MOSFET in same InGaAs epitaxial layer side by side

Summary

Introduction

The low voltage analog and digital circuits are integrated with power devices results in the development of smart power integrated circuits (PICs). A discrete power device with trench gate structure is more effective suitable for low voltage analog/digital and RF applications due to lower value of on-state resistance as compared to any other architecture with same specifications [4, 5]. Silicon-on-insulator (SOI) technology is dominantly used for making the RF power integrated circuits (PICs) due to its mature fabrication process with well-studied native oxide in order to get advantage of better reliability, improved performance, low power consumption, and reduction in size, weight and cost [12,13,14]. The motive of this paper is to propose the integration of low voltage MOSFET and high power dual-gate MOSFET on emerging InGaAs semiconductor material using trench technology for better performance of the device

Device Structure

Results And Discussion

Conclusion

17. ATLAS user’s manual