Abstract

Modular adder is used in Residue Number System (RNS) addition. Moduli set with the form of 2 n -2 k - 1(1≤ k≤ n-2) can offer excellent balance among the RNS channels for multi-channel RNS processing. In this paper, a Finite Impulse Response (FIR) filter using a novel algorithm and its Very Large Scale Integration (VLSI) implementation structure are proposed for modulo 2 n -2 k -1 adder. In the Modular adder algorithm, parallel prefix operation and carry correction techniques are adopted to eliminate the re-computation of carries. Any existing parallel prefix structure can be used in the novel modulo adder. Thus, we can get flexible tradeoff between area and delay. This paper presents FIR filter implementation with modulo 2 n -2 k -1 adder and n +1. These2 n -1 and 2 n +1 adders are based on parallel prefix and carry correction respectively. Some modulo 2 n -2 n-2 -1 adder based on the technique of carry offset, which is only required to obtain the carry information of A+B. In order to find the carries for addition each carry is modified to the utmost carry(4). By using carry computation,the block corrects the carries further in the proposed modulo adder. In this paper, the modulo adder 2 n -2 k -1 is based on the carry correction and parallel prefix addition is proposed. This modulo adder is divided into four units pre-processing unit, the prefix computation unit, the carry correction unit, and the sum computation unit. This paper is organized as follows: section II describes the RNS background and arithmetic operation. Section III describesthe novelmodulo2 n -2 k -1 adder and it's self-testing. Section IV describesthe application of modulo adder in FIR filter. In section V simulation results and comparisons are presented and in section VI conclusion are listed.

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