Abstract

This paper aims to present a mathematical morphological method to remove baseline wandering and background noise is removed from original ECG signal. Then the multipixel modulus accumulation is employed to act as a low-pass filter to enhance the QRS complex and improve the signal-to-noise ratio. The performance of the algorithm is evaluated with standard MIT-BIH arrhythmia database. Corresponding power and area efficient VLSI architecture is designed and implemented on a commercial nano-FPGA. High detection rate and high speed demonstrate the effectiveness of the proposed detector. Index Terms: Body sensor networks (BSNs), electrocardiogram (ECG) sensor, field-programmable gate array (FPGA), mathematical morphology, QRS detection, very-large-scale integration (VLSI) architecture

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