Abstract

To provide an optimised implementation aimed at calculating the chirp scaling (CS) coefficients used in state-of-the-art spaceborne synthetic aperture radar (SAR) imaging systems. Built on the core concept of breaking down the CS coefficient calculation into basic operations, we propose a new architecture that adopts a dual-operator engine as the basic processing unit and seeks to optimise the switching network of operator engines through an appropriately interconnected grouping of various calculations. A wide variety of SAR imaging architectures based on fast Fourier transformation-CS operations may benefit from this work. The proposed architecture is implemented in a Xilinx Virtex-7 FPGA process; a comparison between test results and results obtained from an off-the-shelf counterpart confirms the efficacy of the proposed architecture.

Full Text
Paper version not known

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.