Abstract
Residue Number System (RNS) is often used in Cryptographic applications. Choice of a unique base for RNS is an important factor in implementing RNS. Bit folding after multiplication is a commonly used method for implementing RNS. In this paper an architecture based on modulo 2 n -3 arithmetic is implemented. Each word of partial product is mapped once normal and then with one bit left shift with reference to the base number. The results are tabulated in terms of delay and area with Xilinx tool. Efficiency of implementation is compared with results available in literature.
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