Implementation of ANN-Based Embedded Hybrid Power Filter Using HIL-Topology with Real-Time Data Visualization through Node-RED

Abstract

Electrical power consumption and distribution and ensuring its quality are important for industries as the power sector mandates a clean and green process with the least possible carbon footprint and to avoid damage of expensive electrical components. The harmonics elimination has emerged as a topic of prime importance for researchers and industry to realize the maintenance of power quality in the light of the 7th Sustainable Development Goals (SDGs). This paper implements a Hybrid Shunt Active Harmonic Power Filter (HSAHPF) to reduce harmonic pollution. An ANN-based control algorithm has been used to implement Hardware in the Loop (HIL) configuration, and the network is trained on the model of pq0 theory. The HIL configuration is applied to integrate a physical processor with the designed filter. In this configuration, an external microprocessor (Raspberry PI 3B+) has been employed as a primary data server for the ANN-based algorithm to provide reference current signals for HSAHPF. The ANN model uses backpropagation and gradient descent to predict output based on seven received inputs, i.e., 3-phase source voltages, 3-phase applied load currents, and the compensated voltage across the DC-link capacitors of the designed filter. Moreover, a real-time data visualization has been provided through an Application Programming Interface (API) of a JAVA script called Node-RED. The Node-RED also performs data transmission between SIMULINK and external processors through serial socket TCP/IP data communication for real-time data transceiving. Furthermore, we have demonstrated a real-time Supervisory Control and Data Acquisition (SCADA) system for testing HSAHPF using the topology based on HIL topology that enables the control algorithms to run on an embedded microprocessor for a physical system. The presented results validate the proposed design of the filter and the implementation of real-time system visualization. The statistical values show a significant decrease in Total Harmonic Distortion (THD) from 35.76% to 3.75%. These values perfectly lie within the set range of IEEE standard with improved stability time while bearing the computational overheads of the microprocessor.