Implementation of an Enhanced-Hamming Code Method for CAN Communication to Reduce the Frame Bits

Abstract

Controller Area Network (CAN) communication utilizes Cyclic Redundancy Check (CRC) code to detect errors. The main objective of this paper is to use an alternative error detection method and to implement correction which is called as the Hamming code, replacing the conventional CRC code. Moreover, this proposal uses an enhanced-Hamming code, because the redundancy bits will be appended at the end of the data bits to possibly increase the CAN's frame rate of the system and to avoid in using the overhead payload of spreading these bits. The bit's positions of the redundancy bits ‘r' will be determine based on the total number of bits starting from the start-of-frame (SOF) to the data-bit frames of the CAN system. These bits will be fed into the redundancy bit controller to compute for the necessary r. Then, the computed redundancy bits will be placed right after the data bits' position and it will be calculated using modulo-2 operation based on the conventional Hamming code algorithm. This proposed method is synthesized using Xilinx Virtex-5 FPGA. The simulation results shows a significant increase of CAN's frame rate, and it minimizes the bits stuffing payload and can be a better option for detecting and correcting error in CAN System.