Implementation of an 8-bit ADC using successive subtraction technique

Abstract

In this article, an 8-bit ADC circuit is proposed, using op amps in successive subtraction method. This circuit does not require any clock signal, internal DAC or decoder, etc. because it performs the conversion process completely in the analog domain. Applying a supply voltage of ±6 V, it consumes 242 mW power and the settling time is measured as 156 μs.