Implementation of a ternary coder/decoder

Abstract

This paper describes the circuits used to translate binary data into a run length limited recording code and from the code back to binary data. The code is referred to as ternary 3 because it is derived from 3 PM code, but uses three symbols (0, 1 and 2) rather than two (0 and 1), resulting in higher recording density, longer detection window and identical ratio between Tmax and Tmin. The encoder circuit is based on a ROM used as code look-up table and is built from standard ECL (lOK) ICs. The decoder is similar to the encoder, but requires some additional logic to resolve an initial ambiguity. The encoder and decoder have been operated back-to-back at a binary data rate of 25 Mb/s.