Implementation of a Safe and Efficient Point Multiplication for SM2 Algorithm

Abstract

With the development of information security and communication technology, SM2 algorithm has been widely used in security chip, secure communication and other fields. Point multiplication is a key operation that affects the speed and security of SM2 algorithm. In order to make the implementation of SM2 algorithm safer and faster, this design optimized the fixed window method of implementation method of point multiplication, which mainly includes: mathematical transformation in the implementation process, adding a subtraction to achieve the purpose of security, and combining it with the point coordinate randomization, scalar randomization, and point verification security protection measures, achieving the effect of resisting common analyses against SM2 algorithm. Using the design compiler tool and UMC55 process library to synthesize the design, the module area is 29,793GE (equivalent NAND gate). Through comparison, it achieves significant optimization effect and has the advantages of small area, relatively high performance and high security. Finally, the security analysis shows that the module can resist timing analysis, simple power analysis and other common analyses against SM2 algorithm, and can be applied to hardware implementation scenarios that require higher speed and higher security.