Abstract

We introduce a real-time, dual independent output MPEG-2 transport stream (TS) processor designed specific for the China HDTV testing zones. The processor is a single piece of equipment, of which the core functions are realized in FPGA and DSP. Key technologies include a program clock reference (PCR) correction and a packets controller, which are important for TS processing, are described in detail. An improved PCR correction scheme developed by the authors is also proposed.

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call

Disclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.