Implementation of a Microprocessor-Based Access Controllers for a Multi-Drop Multi-Access Network

Abstract

This paper describes the development of a microprocessor-based intelligent interface for handling the data link layer protocol in a multi Access Multi Drop Network. The development effort has the objective of producing an inteface board which will have the data source/destination on one side and the data network on the other. Apart from specifying the data destination, the user of this interface board will not be required to handle any of the other operational aspects of the network itself.The system being currently implemented is a modified SDLC Loop network capable of supporting one primary station (also acting as a gate way to other loops) and upto 254 secondary stations. The Network allows data link connections between any two stations in the network. For testing purposes the data rate supported by the loop is presently fixed at only 9.6 Kbps. Very minimal changes in hardware will allow upgrading the loop speed to 64 Kbps. This interface is being implemented using-standard LSI chips and other off-the-shelf components. The next planned upgrade is to change some of the LSI chips (and some of the interfacing software) in order to handle speeds of up to 880 Kbps.We have also started styding the implementation of a network using an Ethernet protocol with the objective of developing an interface board for it. This design effort also aims at using standard LSI Chips but not the Ethernet Controller device newly announced from INTEL. This design is still in its infancy and is likely to change as and when the Ethernet Controller devices are available.