Abstract
Since the new technologies like big data and cloud computing require tremendous amount of transactions between CPU and memory, researches on a new memory system called PIM (processing in memory) architecture has been suggested as a solution for those memory intensive applications. This paper introduces a low-head PIM architecture. And we introduce the processing techniques of the PIM's instructions on the PIM architecture. And we have designed the PIM architecture using Verilog HDL, and the operation of the PIM architecture verified through RTL simulation.
Sign-in/Register to access full text options 
Talk to us
Join us for a 30 min session where you can share your feedback and ask us any queries you have
Schedule a callDisclaimer: All third-party content on this website/platform is and will remain the property of their respective owners and is provided on "as is" basis without any warranties, express or implied. Use of third-party content does not indicate any affiliation, sponsorship with or endorsement by them. Any references to third-party content is to identify the corresponding services and shall be considered fair use under The CopyrightLaw.
