Implementation and Realisation of Micro Digital Sun Sensor Processing in FPGA

Abstract

AbstractThis paper presents the implementation and realization of complex processing algorithms of newly developed, high accuracy, compact, two axes Micro Digital Sun Sensor (MDSS) using linear CMOS detector and N‐shaped slit mask for Indian Satellite missions. Sun sensor provides the orientation of satellite with respect to Sun. It is one of the prime attitude sensors for spacecraft. Due to low mass, compact size and low power consumption, the MDSS will be used for future micro/nano‐satellite missions as well as for communication Satellite missions. The electrical model of MDSS is built in Laboratory for Electro‐Optics Systems (LEOS). It is around 10 times lesser in weight and 8 times compact than the high accuracy Sun sensors presently available in ISRO. The MDSS has accuracy of 0.02°. In this paper, we have presented details of the simulation and test results of Micro DSS processing.The MDSS consists of an optical head and FPGA based processing unit. The optical head consists of CMOS linear array detector and N shaped slit mask. The N slit mask is mounted at a predefined height above the detector to provide the sensor field of view of ±64° x ±64°. The sunlight falls on the detector through the N‐shaped slit and three Sun spots are formed on the detector. After removing the unwanted signals from the images using auto threshold method, the image identification and centroid computation are carried out using moment method algorithm in real time and using the real time image clustering and centroid computing algorithm. By applying sensor transfer function, the 3 centroid information are converted to Sun aspect angle information which are the sensor outputs used for determining orientation of Satellite.All the processing is done in a single FPGA, like control signals generation for detector, real time centroid calculations, complex image clustering, transfer equation realization, interfacing with output, command module and MIL‐STD‐1553B communication. The complex transfer equation which includes trigonometric functions is implemented inside the FPGA using Co‐Ordinate Rotation Digital Computer (CORDIC) algorithm without any processor. The processing unit consists of ACTEL RTAX or Proasic FPGA with MIL‐STD 1553B and LVDS peripheral interface.