Abstract
A selection of six well-understood intrinsic PUF constructions were implemented on a common test ASIC in an attempt to quantitatively assess and objectively compare their characteristics, both from a security as well as from an implementation perspective. This chapter first presents the rationale and setup of the chip’s design and the implementation details of each of the selected PUF types: the arbiter PUF, the ring oscillator PUF, the SRAM PUF, the D flip-flop PUF, the latch PUF and the buskeeper PUF. Next, the author presents a first objective comparison between these PUF constructions by evaluating their basic quality metrics, being silicon area size, reliability, uniqueness and unpredictability, on a representable set of 192 manufactured ASIC samples. The abundance of experimental data is summarized in meaningful statistics which will be of great use later on for assessing the efficiency of these PUF types in typical PUF-based applications.
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