Abstract

Multilevel inverters remain an area of research interest due to the superior performance against a two-level counterpart. Reducing the switch count and stress on the power electronic switches while maintaining a sinusoidal stepped output remains a challenge. A multilevel inverter topology has been proposed in this work which utilizes twelve switches and four dc voltage sources to produce a 15-level staircase output voltage waveform. The objective is to reduce the harmonic in the output voltage and thereby reducing the cost of filter requirement and maintaining high efficiency throughout the operating range. Control of output voltage has been done using the Nearest Level Pulse Width Modulation Strategy (NLPWM). Simulation and hardware implementation of the topology under different loads and dynamic conditions are presented to validate the robust performance.

Highlights

  • Multilevel inverters (MLIs) are a class of converters that are seen as having immense potential in research and development

  • Some of the applications are in variable speed drives, Renewable Energy System (RES) [1],[2], HV direct current Transmission (HVDC), flexible alternating current transmission systems (FACTS), and electric vehicles (EVs) and More Electric Aircraft (MEA) systems [3],[4]

  • The three classical topologies of MLIs proposed in the literature are the flying capacitor (FC) MLI, neutral point clamped (NPC) MLI, and cascaded H-bridge (CHB) MLI, with each having several variants [5]

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Summary

INTRODUCTION

Multilevel inverters (MLIs) are a class of converters that are seen as having immense potential in research and development. They have a wide range of applications in the power engineering sector. When compared to 2-level inverters, MLIs produce better sinusoidal output reducing the Total Harmonic Distortion (THD), lowering filter requirements while possessing higher efficiency, modularity, and reduced stress across power electronic devices. The NPC topology has the problem of requiring a sizeable number of clamping diodes with greater levels forming output voltage waveform. CHB MLI has lesser diodes and capacitor requirements when compared to the other classical topologies. AMO is capable of producing a greater number of levels as compared to SMO while using the same quantity of dc voltage sources and circuit devices.

DESCRIPTION AND ANALYSIS OF THE PROPOSED TOPOLOGY
PERFORMANCE COMPARISON
LOSS ANALYSIS
SIMULATION RESULTS
EXPERIMENTAL VERIFICATION
CONCLUSION
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