Impacts of Stress Voltage and Channel Length on Hot-Carrier Characteristics of Tunnel Field-Effect Thin-Film Transistor

Abstract

Hot-carrier stress (HCS) characteristics of polycrystalline-silicon (poly-Si) tunnel field-effect thin-film transistors are investigated and compared with the conventional poly-Si thin-film transistors (TFTs). After HCS with ${V}_{{\text {DS}}} = {2}{V}_{{\text {GS}}} = {20}$ V for 1000 s, poly-Si TFT exhibits significant ON-state current ( ${I}_{{\text {on}}}{)}$ degradation ~85% and two-step subthreshold swing (SS) behavior due to the serious lattice damage between the pinch-off point and the drain. For the poly-Si tunnel field-effect transistor (TFET), less ${I}_{{\text {on}}}$ degradation ~70% is observed. In addition, the stress drain voltage ( ${V}_{{\text {DS}}}$ ) effect of the HCS is also studied. When the stress ${V}_{{\text {DS}}}$ is increased from 10 to 15 V, the poly-Si TFETs exhibit more obvious stressed ${I}_{{\text {on}}}$ degradation (~24.4%) than that of poly-Si TFTs (~6.5%). When the stress ${V}_{{\text {DS}}}$ is further increased from 15 to 20 V, the poly-Si TFETs exhibit less stressed ${I}_{{\text {on}}}$ degradation (~62.4%) than that of poly-Si TFTs (~85%). Because the increase in the stress drain voltage is dropped in the pinch-off region of the poly-Si TFETs after the pinch-off phenomenon occurs, resulting in less impact on the stress field at the tunnel junction. When the channel length is decreased, the results show that the HCS effect of poly-Si TFETs is insensitive to the channel length, and the poly-Si TFTs show more serious electrical degradation and breakdown behavior with the scaling down of the channel length. The stronger HCS immunity of poly-Si TFETs would be an important advantage to replacing poly-Si TFTs for applications of 3-D integrated circuits.