Impacts of high-k gate dielectrics and low temperature on the performance of nanoscale CNTFETs

Abstract

The influence of gate dielectric materials on the performance of a carbon nanotube field-effect transistor has been studied by a numerical simulation model. This model is based on a two-dimensional nonequilibrium Green's function formalism performed with the self-consistent solution of the Poisson and Schrodinger equations. The device performance is investigated in terms of leakage current, on-state current, $$I_{\mathrm{ON}}/I_{\mathrm{OFF}}$$ION/IOFF current ratio, subthreshold slope, drain-induced barrier lowering, as well as transconductance, drain conductance, and intrinsic gate delay. This study is carried out over a wide range of dielectric permittivities at low temperatures ranging from room temperature down to 100 K.