Impacts of a buffer layer and hydrogen-annealed wafers on the performance of strained-channel nMOSFETs with SiN-capping layer

Abstract

In this study, the effects of Si 3N 4 layer capping and TEOS buffer layer inserted prior to the Si 3N 4 deposition on the NMOS device characteristics as well as correlated hot-electron degradations were investigated. The devices were built on two kinds of the substrates, namely, Cz and hydrogen-annealed (Hi) wafers. More importantly, we found that hydrogen species is the primary culprit for aggravated reliabilities in strained devices. By exerting the accelerated stress test, we could study the hot-electron degradation thoroughly in terms of threshold voltage shift (Δ V TH), transconductance degradation (ΔGm) and so on. The TEOS buffer layer could effectively block the diffusion of hydrogen species from the Si 3N 4 capping layer into the channel and the Si/SiO 2 interface during the Si 3N 4 deposition as well as subsequent thermal cycles.