Abstract
This paper studies the root causes of the impacting factors for within-shot Idsat uniformity (IDU) improvement, and presents a model to characterize the impact factors. RTA process is one of main factors leading to high IDSAT non-uniformity within-shot because its initial temperature, ramp-up rate, peak temperature and ramp-down rate can affect the amount of thermal absorption and thermal distribution in the chip. Therefore the optimized RTA process can improve the thermal distribution in the chip, hence the IDU across the wafer. We also study the correlation of the transmission rate pattern density and the equivalent reflectivity to the device performance. Based on the model simulation results, we can modify the chip arrangement within the Multi-Project Wafer (MPW) shot in the way that can optimize the RTA process and improve both NMOS and PMOS the Idsat uniformity about ~20%. The use of this model can help to provide the guideline for the optimized arrangement of multiple chips within the shot to achieve better IDU performance
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