Abstract

The choice of gate metal technology for junctionless transistors needs to have diverse characteristics as metals have distinct work functions and hence, they show incompatibility while tailoring threshold of the device. In such a scenario, bimetallic stacked gate can be a promising candidate to present wide range of tunable work functions required for nano-regime junctionless transistors. This paper explores the electronic phenomena occurring at metal-metal interface and the impact of Platinum (Pt)/Titanium (Ti) bimetallic stacked gate-based work function tunability on the RF and thermal performances of p-type window-based Silicon on Insulator Junctionless Transistor (SOI JLT) using numerical simulator SILVACO ATLAS. The parameters considered for performance evaluation are ON-state current (I_{ON}), OFF-state current (I_{OFF}), I_{ON}/I_{OFF} ratio, transconductance (g_m),\linebreak cutoff frequency (f_T), Transconductance Frequency Product (TFP), Intrinsic Gate Delay (IGD), intrinsic gain (A_V), and Global Device Temperature (GDT). The g_m, f_T, TFP, A_V and GDT improve for modified over conventional in the ON state at higher work function, while IGD improves at lower work function. The improvements of 11.7% and 2.21% are obtained in maximum g_m and f_T, respectively, for modified transistor over conventional. The findings suggest that bimetallic stacked gate modified SOIJLT is a better option than conventional for low-power RF application.

Full Text
Published version (Free)

Talk to us

Join us for a 30 min session where you can share your feedback and ask us any queries you have

Schedule a call