Impact of Time Delay on the Control Link in Small Signal Dynamics of LCC-HVDC System

Abstract

The time delay in the control link will affect the small signal stability of the line commutated converter based high voltage direct current (LCC-HVDC) system. This paper establishes the small signal model for the LCC-HVDC system considering the time delay in the control link. Then, based on the developed models, the movement feature of the eigenvalue loci with varying time delay under different AC system strength is investigated, the impact of the time delay on the system stability margin is quantitatively evaluated, and the frequency band affected by the time delay is identified. Subsequently, influence mechanisms of time delay on system stability are revealed from the perspective of the system damping characteristic by decomposing different damping paths. Moreover, impacts of time delay on DC current/voltage controller's stability margin are investigated. Theoretical analysis and simulation results indicate that, the increase of time delay at the rectifier-side will continuously deteriorate the system stability, as well as the system dynamic performances, while in most cases the increase of the time delay at the inverter-side imposes a non-monotonic effect on the system stability, which is weakened first and then slightly strengthened. Therefore, in certain scenarios, the larger time delay at the inverter-side may play a positive role in the system stability to some extent. The results can provide certain technical reference for the identification of key influencing factors causing the system oscillation and reasonable selection of control parameters in practical LCC-HVDC projects.