Abstract
We investigated the effect of material choice and orientation in limiting source to drain tunneling (SDT) in nanowire (NW) p-MOSFETs. Si, Ge, GaSb, and Ge 0.96 Sn 0.04 nanowire MOSFETs (NWFETs) were simulated at a scaled gate length (L G ) of 10 nm, using rigorous ballistic quantum transport simulations. To properly account for the non-parabolicity and anisotropy of the valence band, the k·p method was used. For each material, we simulated a set of six different transport/confinement directions, at a fixed OFF-state current (I OFF ) of 100 nA/μm and supply voltage V DD = -0.5 V to identify the direction with the highest ON-current (I ON ). For Ge, GaSb, and GeSn [001]/110/110 oriented NWFETs, with [001] being the direction of transport and 110, 110 being the directions of confinement for the nanowire, showed the best ON-state performance, compared to other orientations. Our simulation results show that, despite having a higher percentage of SDT in OFF-state than silicon, GaSb [001]/110/110 NWFET can outperform Si NWFETs. We further examined the role of doping in limiting SDT and demonstrated that the ON-state performance of Ge and GeSn NWFETs could be improved by reducing the doping in the source/drain (S/D) extension regions. Our simulation result show that with properly chosen channel transport orientation and S/D doping concentration, performance of materials with high hole mobility can be optimized to reduce the impact of SDT and provide a performance improvement over Si-channel based p-MOSFETs.
Highlights
Increased source to drain tunneling (SDT) leakage in devices with short channel length can become a significant roadblock in scaling down transistor dimensions [1]–[3]
A lower value of doping in the S/D extension regions of GaSb nanowire MOSFETs (NWFETs) is chosen since it is difficult to achieve higher doping levels in III-V semiconductors [33], due to the lower solid solubility limit of dopants in III-V semiconductors compared to group IV semiconductors
In this work, we have for the first time, carried out a comprehensive analysis of the impact of source to drain tunneling (SDT) on the performance of GaSb and GeSn NWFETs
Summary
Increased source to drain tunneling (SDT) leakage in devices with short channel length can become a significant roadblock in scaling down transistor dimensions [1]–[3]. III-V semiconductors with high electron mobility like InGaAs, regarded as promising candidates for future generation n-. MOSFETs [4] are more susceptible to SDT leakage due to their lower transport effective mass (m∗trans). III-V channelbased p-MOSFETs can be more immune to SDT leakage in OFF-state compared to their n-channel counterparts at scaled gate to electron lengths due to m∗trans. Devices their based higher m∗trans compared on III-V materials like. It may be possible to engineer hole effective masses in materials with higher hole mobility compared to Si, to limit SDT and improve the device performance. Conventional mobility enhancement techniques like using embedded source/drain (S/D) stressor or strained capping layers are becoming less effective at very small gate pitches [10]
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