Impact of Parasitic and Load Current on the Attenuation of Motor Terminal Overvoltage in SiC-Based Drives

Abstract

In SiC-based adjustable speed drives, the high voltage slew rate ( <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"><tex-math notation="LaTeX">$dv\!/\!dt$</tex-math></inline-formula> ) of the switching transitions results in excessive overvoltage at the motor terminals due to the reflected voltages across the drive power cables. Besides the cable length, the switching rise/fall times of the voltage pulses are a key parameter to quantify the motor overvoltage in pulsewidth modulation (PWM) inverter-fed drives. These times are varying depending on the load current and parasitic elements of SiC <sc xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink">mosfet</small> s, that is, a standard two-level converter typically results in a nonuniform overvoltage envelop at the motor terminals. This article analyses the switching mechanism of the two-level converter considering the impact of SiC parasitic elements and load current showing how they affect the motor overvoltage in cable-fed drives. The analysis is then extended to the mitigation of the motor overvoltage using quasi-three-level (Q3L) modulation as a candidate filter-less approach with a T-type converter. The theoretical analysis is validated through experimental tests by using the Q3L T-type converter. The analysis and results show that the instantaneous load current value critically determines the peak motor overvoltage, while it allows either a full or partial overvoltage mitigation when the Q3L modulation is adopted.