Impact of on-chip inductance when transitioning from Al to Cu based technology

Abstract

How does on-chip inductance impact timing closure when transitioning from Al to Cu based technology? This paper presents some experimental results based on a Al-based 0.18 /spl mu/m CMOS process and a Cu-based 0.13 /spl mu/m CMOS process. The results show that the impact of on-chip inductance is slightly more on the Cu-based 0.13 /spl mu/m process than on the Al-based 0.18 /spl mu/m process. Furthermore, the results demonstrate that on-chip inductance plays an insignificant role if we assume a perfect power supply network around the interconnect routes.