Impact of Hot Carrier Aging on the Performance of Triple-Gate Junctionless MOSFETs

Abstract

In this article, we investigate the impact of the hot carrier (HC) aging on the performance of nanoscale n-channel triple-gate junctionless MOSFETs with channel length varying from 95 down to 25 nm. The devices were electrically stressed in the ON-state region of operation at fixed gate voltage ${V}_{g} = {1.8}$ V and drain bias ${V}_{d} = {1.8}$ V, with the stress time being a variable parameter. The device degradation was monitored through the relative change with stress time of the threshold voltage, subthreshold swing, linear drain current, low-field mobility, series resistance, and gate current. For relatively long-channel transistors ( ${L} = {95}$ nm), the threshold voltage and the subthreshold swing remain almost unchanged, whereas the ON-state drain current is degraded showing a good correlation with the series resistance degradation, caused by HC-induced damage in the drain region. For short-channel transistor ( ${L} = {45}$ nm), the HC-induced damage is extended in the channel region: interface traps are generated, exhibiting good correlation with both threshold voltage and low-field mobility degradations. For the very short-channel device ( ${L} = {25}$ nm), after long stress time, the HC-induced interface degradation is severe, causing a continuous increase of the ideality factor with increasing the gate voltage.