Impact of high‐temperature rapid thermal annealing in deep‐submicrometer CMOSFET design

Abstract

AbstractWe investigated the impact of high‐temperature rapid thermal annealing (HT‐RTA) for CMOSFET design in the deep‐submicrometer regime. HT‐RTA (>1000 °C) carried out immediately after ion implantation can reduce the transient enhanced diffusion of implanted impurities and suppress interactions between these impurities, both of which are usually observed in low‐temperature furnace annealing processes. HT‐RTA is definitely effective in CMOSFET design optimization, since it can control impurity profiles more precisely than conventional thermal processes, leading to improvements in the short‐channel effects, current drivability, and reliability of MOSFETs. We also show that HT‐RTA serves as a methodology for analyzing the RSCE (reverse short‐channel effects) and ESCE (enhanced short‐channel effects) taking place simultaneously in deep‐submicrometer MOSFETs.