Impact of ESD protection device trigger transient on the reliability of ultra-thin gate oxide

Abstract

Common ESD protection devices have a snapback characteristic similar to a silicon-control rectifier. The transient voltage required to trigger these devices usually is not an important design criterion as long as it is not too high. In this work, it is demonstrated that the defect generation mechanism in oxide during electrical stress remains unchanged in the sub-nanosecond stress regime. As a result, the voltage transient can create far more defects in the gate oxide than the main ESD event clamped at the holding voltage. Due to difficulty in measurement, this oxide reliability degradation can lead to chip failure but not show up in simulated ESD test.