Impact of dual field plates on drain current degradation in InAlN/AlN/GaN HEMTs

Abstract

InAlN/AlN/GaN HEMTs with both source and gate dual field-plates (FPs) are proposed. To investigate the influence of dual FPs on the devices characteristics, two types of devices with gate FP and without FPs were fabricated and tested. The devices were subjected to different kinds of short-term direct current bias (DC-bias) stress conditions. The results show that after the off-state bias stress, the drain current reduction rate of the devices with dual FPs was 3.32%, which was less than that in both devices with a gate FP of 7.57% and devices without FPs of 14.63%. The current collapse of the HEMTs with dual FPs was relieved due to the increase of electric field uniformity between the gate and drain. The degradation of the output characteristics was more serious after the on-state bias stress. In addition, the effects of bias stress on the transfer characteristics of the devices were studied, and the trapping processes under different stress conditions in the devices were discussed.