Impact of Deposition Temperature of the Silicon Oxide Passivation on the Performance of Indium Zinc Oxide Thin-Film Transistors

Abstract

Indium zinc oxide (IZO) thin-film transistors (TFTs) with SiO2 passivation deposited by plasma-enhanced chemical vapor deposition (PECVD) were fabricated. The impact of deposition temperature of the SiO2 passivation on the performance of the IZO-TFTs was investigated. It is found that the hydrogen content in the IZO film increases and the number of oxygen vacancies decreases as the SiO2 deposition temperature increases. The IZO-TFTs with SiO2 deposited at temperature higher than 230 °C show high conductive, and those with SiO2 deposited at temperature lower than 210 °C are less stable under positive bias stress (PBS). X-ray photoelectron spectroscopy (XPS) dept profile experiments show that IZO films covered by SiO2 deposited at lower temperature have larger amount of loosely bound oxygen impurities which act as acceptor-type traps. We propose that the origin of the positive Von shift under PBS is the electrons trapped by the loosely bound oxygen impurities generated during the deposition of the SiO2 passivation.