Impact of Deformation Potential Increase at Si/SiO2 Interfaces on Stress-Induced Electron Mobility Enhancement in Metal–Oxide–Semiconductor Field-Effect Transistors

Abstract

The impact of deformation potential increase at metal–oxide–semiconductor (MOS) interfaces on stress effects is thoroughly studied. In our previous study, we revealed that the deformation potential (Dac) of Si increases at MOS interfaces. The energy split between two- and four-fold valleys is proportional to Dac. Therefore, it is considered that the Dac increase at MOS interfaces has an affect on strain effects. Dac effectively changes by adjusting Si-on-insulator (SOI) thickness and carrier distribution at MOS interfaces. Therefore, the SOI thickness dependence and carrier distribution dependence of electron mobility enhancement ratio (Δµe/µe) under strain are investigated. Experimental results are explained by the model including the Dac increase at MOS interfaces. In addition, experimental data are well reproduced by calculation using the position-dependent-Dac model. By applying uniaxial strain, effective mass, subband occupation, and intervalley scattering rate are also changed. Their effects on Δµe/µe are also discussed in this paper.