Abstract
All electronic devices, in this case, SiC MOS transistors, are exposed to aging mechanisms and variability issues, that can affect the performance and stable operation of circuits. To describe the behavior of the devices for circuit simulations, physical models which capture the degradation of the devices are required. Typically compact models based on closed-form mathematical expressions are often used for circuit analysis, however, such models are typically not very accurate. In this work, we make use of physical reliability models and apply them for aging simulations of pseudo-CMOS logic inverter circuits. The model employed is available via our reliability simulator Comphy and is calibrated to evaluate the impact of bias temperature instability (BTI) degradation phenomena on the inverter circuit’s performance made from commercial SiC power MOSFETs. Using Spice simulations, we extract the propagation delay time of inverter circuits, taking into account the threshold voltage drift of the transistors with stress time under DC and AC operating conditions. To achieve the highest level of accuracy for our evaluation we also consider the recovery of the devices during low bias phases of AC signals, which is often neglected in existing approaches. Based on the propagation delay time distribution, the importance of a suitable physical defect model to precisely analyze the circuit operation is discussed in this work too.
Highlights
Due to its outstanding properties, silicon carbide (SiC) is an excellent candidate for replacing conventional silicon-based power devices, especially for applications operating in harsh environments [1]
Existing approaches use compact models that are typically based on simple mathematical formulas for circuit analysis and cannot account for aging mechanisms such as bias temperature instability (BTI) at a very high accuracy over a wide range of temperature, bias and operating conditions
We employ three transistor technologies and extend the compact models provided by the device vendors to be suitable for precise BTI evaluation
Summary
Due to its outstanding properties, silicon carbide (SiC) is an excellent candidate for replacing conventional silicon-based power devices, especially for applications operating in harsh environments [1]. As a consequence of BTI, an increase of Vth during the operation of the device introduces additional delays in circuits This may lead to a higher on-resistance which negatively affects the power conversion efficiency of selected circuits [3]. All device kinds are fabricated on SiC substrate, their behavior it terms of drift of the threshold voltage is different This is due to the fact that each device has been fabricated under different processing conditions which leads to a different trap distribution. These models typically do not account for aging mechanisms such as BTI To close this gap, we evaluate the impact of BTI on the device behavior under operation, e.g., the drift of the threshold voltage over time. We combine the provided models with our calibrated reliability simulations to thoroughly analyze the degradation of the performance of the inverter circuits over time
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