Impact of a Pocket Doping on the Device Performance of a Schottky Tunneling Field-Effect Transistor

Abstract

It is known that a pocket at the drain end of a Schottky barrier tunneling FET (SB-TFET) helps to improve the device performance in terms of greatly suppressed ambipolar current and reduced drain-induced barrier lowering (DIBL). A detailed investigation, with the help of a numerical device simulator, of the impact of using such a pocket either at the source end or at both the source and the drain ends of an SB-TFET is reported for the first time in this paper. The performance of the above-mentioned two devices is compared with a device having a pocket at the drain end and a conventional MOSFET. Optimization of the barrier height and the pocket parameters is made before performance comparison. It is observed that a pocket at the drain end helps suppress the ambipolar current and reduce both the subthreshold swing and the DIBL. On the other hand, a pocket at the source end helps to improve the ON-state current \(I_{\mathrm{{\scriptstyle ON}}}\) . Using a pocket at both the source and the drain ends results in overall improvement of the device performance. The effects of scaling on such device performance parameters are also reported.