Impact ionization rate of electrons for accurate simulation of substrate current in submicron devices

Abstract

An expression for the impact ionization rate of electrons for accurate simulation of substrate current in submicron silicon devices and a methodology to optimize the empirical constants of the expression is reported. The optimized expression for the impact ionization rate of electrons fitting the measured substrate current in Lightly Doped Drain (LDD)-type n-channel silicon MOSFET devices of 0.8 micron CMOS technology is found to be: α n ≅ 1.65 × 10 6 exp[−(1.231 × 10 6/ E) 1.23], where E is the electric field component along the current path. The simulated results obtained by this expression agree extremely well with the measured data for LDD type n-channel silicon MOSFETs of different channel lengths.