Abstract
P-type ferroelectric field-effect transistors (p-FEFETs) are of significant interest due to recent reports on their immediate read-after-write capability (unlike their n-type counterparts), which is of prime importance for high-speed, embedded memory applications. We show, for the first time, that the delay for read to restore the memory window after write (i.e., read-after-write delay, <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$t_{d}$ </tex-math></inline-formula> ) degrades with continued bipolar stress (voltage cycling) in p-FEFETs, together with memory window <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$(\Delta V_{T})$ </tex-math></inline-formula> collapse. We also unravel the physical origin of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$t_{d}$ </tex-math></inline-formula> degradation. We show that post-stress annealing (400°C/30 min in forming gas) leads to a complete recovery of the subthreshold swing and the gate current to pre-stress levels, and partial recovery of <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$\Delta V_{T}$ </tex-math></inline-formula> and the remnant polarization–but cannot restore p-FEFET’s immediate read capability. This is suggestive of that bipolar stress induced <inline-formula xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xlink="http://www.w3.org/1999/xlink"> <tex-math notation="LaTeX">$t_{d}$ </tex-math></inline-formula> degradation is associated predominantly with “neutral” traps generated by bipolar stress in the bulk of the gate oxide stack (rather than at the interfaces), as in time-dependent-dielectric breakdown (TDDB).
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