Image lag optimisation in a 4T CMOS image sensor for the JANUS camera on ESA's JUICE mission to Jupiter (Conference Presentation)

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The CIS115, the imager selected for the JANUS camera on ESA’s JUICE mission to Jupiter, is a Four Transistor (4T) CMOS Image Sensor (CIS) fabricated in a 0.18 µm process. 4T CIS (like the CIS115) transfer photo generated charge collected in the pinned photodiode (PPD) to the sense node (SN) through the Transfer Gate (TG). These regions are held at different potentials and charge is transferred from the potential well under PPD to the potential well under the FD through a voltage pulse applied to the TG. Incomplete transfer of this charge can result in image lag, where signal in previous frames can manifest itself in subsequent frames, often appearing as ghosted images in successive readouts. This can seriously affect image quality in scientific instruments and must be minimised. This is important in the JANUS camera, where image quality is essential to help JUICE meet its scientific objectives. This paper presents two techniques to minimise image lag within the CIS115. An analysis of the optimal voltage for the transfer gate voltage is detailed where optimisation of this TG “ON” voltage has shown to minimise image lag in both an engineering model and gamma and proton irradiated devices. Secondly, a new readout method of the CIS115 is described, where following standard image integration, the PPD is biased to the reset voltage level (VRESET) through the transfer gate to empty charge on the PPD and has shown to reduce image lag in the CIS115.