III-V on Si Materials Surface Preparation and Process Control for Safety

Abstract

This work studies the effect of wet chemical treatment of III-V based epitaxial layers. III-As high mobility channel materials are considered to be promising candidates and being evaluated for replacing Si NMOS channel in future CMOS devices to sustain further transistor and voltage scaling. Proper surface preparation, native oxide removal and post treatment surface stoichiometry are important when optimizing subsequent deposition of gate stack dielectrics. The results of liquid sampling of waste chemistries from experiments conducted in this work provide an insight into the solubility of InGaAs native oxides and resulting surface conditions. Additional information observed from the estimated etch rates and generation of arsine gas as a by-product of III-V materials interacting with the experimental chemistries allowed evaluating studied reactions for their manufacturability from the process control and safety points of view.