Abstract
Abstract“Scan design” which effectively tests sequential circuits has been popular in the LSI industry. However, to make this operation successful, the scan chain must work normally. This paper proposes a new efficient test method for scan chains. This is based on the idea that an abnormal chain is identified by its abnormal IDDQ. This method can identify even the exact location of an abnormal part. The effectiveness of this method has been confirmed experimentally. © 2002 Wiley Periodicals, Inc. Electron Comm Jpn Pt 2, 85(6): 33–39, 2002; Published online in Wiley InterScience (www.interscience.wiley.com). DOI 10.1002/ecjb.1110
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