Abstract
In this work, we use Density Functional Theory (DFT)-based electronic structure calculations, together with 2D-Device simulations and experiments, to identify and quantify mobility-limiting defects at the 4H-Silicon Carbide (0001) / Silicon Dioxide interface of a Silicon Carbide (SiC) DMOSFET channel. DFT simulations are performed on a variety of possible interfacial defects including the single Carbon interstitial and the Carbon dimer interstitial to calculate their projected Density of States (pDOS) and energy levels. A unique methodology is presented to determine the defect energy levels and corresponding defect concentrations along the channel using DFT calculations, 2D-Device simulations and device I-V measurements. By comparing the results obtained from DFT and 2D-Device simulations, we identified single Carbon interstitials to be the main contributor to mobility-limiting near-interface traps. The defect concentration was also calculated for various locations in the channel.
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