Abstract
I DDQ testing is indispensable in improving the quality of CMOS circuits. Currently, I DDQ testing is usually conducted by using I DDQ test vectors selected from a test set generated for logic testing. Since I DDQ measurement is relatively slow, it is necessary to select a set of I DDQ test vectors which is as small as possible and which can detect as many faults as possible. In this paper, we consider the problem of I DDQ test vector selection based on the transistor short fault model. First, we define fault equivalence for the transistor short-fault model and propose methods for reducing the number of faults that need to be considered by equivalence fault collapsing. Then, we formalize the I DDQ test vector selection problem and propose a new selection method based on fault tables. Furthermore, we show the effectiveness of the proposed method by experimental results.
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