ICP-AES analysis of high-purity silicon

Abstract

An ICP-AES procedure for analyzing high-purity silicon, which is implemented on up-to-date standard equipment and intended to determine 44 impurities with detection limits of n × 10−8−n × 10−6 wt % in silicon, is described. The procedure is compared with ICP-AES procedures, conforming to GOST (State Standard) and published in the literature, in quantity of determined impurities and their detection limits.