Abstract

Two random number generation methods based on regular and chaotic sampling of chaotic waveforms are introduced. IC truly random number generators based on these methods are also presented. Simulation and experimental results, verifying the feasibilities and correct operations of the circuits, are given. Numerical models for the proposed TRNG designs have been developed leading the realization of the random number generator circuits. Moreover, a feedback strategy including offset and frequency compensation circuits have been developed in order to maximize the statistical quality of the output sequence and to be robust against external interference, parameter variations and attacks. Prototype chips have been fabricated by using HHNEC's 0.25 µm eFlash process with a supply voltage of 2.5V, which feature throughput in the order of a few Mbps and fulfill the NIST-800-22 statistical test suites for randomness without post-processing.

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