IC test using the energy consumption ratio

Abstract

Dynamic current-based test techniques can potentially address the drawbacks of traditional and I/sub ddq/ test methodologies. The quality of dynamic current-based test is degraded by process variations in integrated circuit (IC) manufacture. The energy consumption ratio (ECR) is a new metric that improves the effectiveness of dynamic current test by reducing the impact of process variations by an order of magnitude. In this paper, we address issues that are of practical importance to an ECR-based test methodology. We use the ECR to test a low-voltage submicron IC with a microprocessor core. The ECR more than doubles the effectiveness of the dynamic current test already used to test the IC. The defect coverage of the ECR is greater than that offered by any other test, including I/sub ddq/. We develop a logic-level fault simulation tool for the ECR. We also show that statistical techniques can be used to set thresholds for an ECR-based test process. Our results demonstrate that the ECR offers several advantages relative to other transient current-based test methods and to I/sub ddq/ test. The ECR offers the potential to be a high quality low cost test methodology.