Hysteresis in metal insulator semiconductor structures with high temperature annealed ZrO 2/SiO x layers

Abstract

Hysteresis behaviour in sandwich structure — zirconium oxide/chemical silicon oxide, annealed at temperature of 850 °C in oxygen ambient, was studied. Formation of thin ZrSi x O y layer due to the high temperature annealing was found. Metal–insulator–semiconductor (MIS) capacitors using ZrO 2/ZrSi x O y /SiO x insulator were studied. High-frequency capacitance–voltage (HF C– V), current–voltage ( I– V) and current–time ( I– t) measurements were carried out on the Al/ZrO 2/ZrSi x O y /SiO x /Si capacitors. Two leakage current components were identified — tunneling current component at high electric fields and transient current component at low fields. The transient leakage currents are due to charge trapping phenomena. The measured I– t characteristics are related with charging/discharging and dielectric relaxation phenomena. A counter-clockwise HF C– V hysteresis, larger than 2 V at thickness of the stack structure of about 50 nm was observed. Metal–insulator–semiconductor field effect transistors (MISFETs) using ZrO 2/ZrSi x O y /SiO x -gate insulator were studied. P-channel MISFETs with aluminum gate electrode were fabricated on standard n-type silicon substrates. Due to charging/discharging phenomena in the gate dielectric the transistors can be switched between On- and Off-state with the polarity of applied stress voltage.