Abstract
This paper reports on the status of a comprehensive ten-year research and development effort toward hybrid system-in-foil (HySiF). In HySiF, the merits of high-performance integrated circuits on ultra-thin chips and of large-area and discrete electronic component implementation are combined in a complementary fashion in and on a flexible carrier substrate. HySiF paves the way to entirely new applications of electronic products where form factor, form adaptivity and form flexibility are key enablers. In this review paper the various aspects of thin-chip fabrication and embedding, device and circuit design under impact of unknown or variable mechanical stress, and the on- and off-chip implementation of sensor, actuator, microwave, and energy supply components are addressed.
Highlights
Printed circuit board (PCB) and integrated circuit (IC) are well established technologies for achieving both utmost integration density and performance in nanoelectronics and, at the same time, electronic interfacing to the macroscopic user environment
With migrating such concepts to ultra-thin and bendable chips and to foil carriers instead of PCB, one would arrive at a large-area Hybrid Systemin-Foil (HySiF) which paves the way to entirely new applications of electronic components in which form factor, form adaptivity and form flexibility play a decisive role [4]–[7], (Fig. 1)
This paper provides an overview of a comprehensive 10-year research program on HySiF technology and applications, involving thin-chip fabrication (Section II) and embedding (Section III), large-area electronic components (Section IV), design considerations (Section V) and application demonstrators (Section VI)
Summary
Printed circuit board (PCB) and integrated circuit (IC) are well established technologies for achieving both utmost integration density and performance in nanoelectronics and, at the same time, electronic interfacing to the macroscopic user environment. ChipFilm technology allows for fabrication of chips having thickness of 10 μm (Fig. 4c) with the advantage of accurate chip thickness control which eases stress management in foil substrate assembly (see Section III-B). The CFP is embedded into, and interconnected to, the foil substrate of the HySiF in place of the standalone thin chip This allows for omitting any bond pads at the chip edges, achieving smaller silicon die area for reducing cost as well as realizing a far higher I/O count (Fig. 7). Large passive components such as antenna’s, inductors and transformers can be embedded into the foil periphery of those chips This points directly to the CFP technology which allows seamless interconnection of the electronics on chip and such metal passives off chip. It may be required to combine those battery power supplies with flexible micro super capacitors for buffering abrupt high demands of energy [41]
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