Hybrid DPWM with process and temperature calibration

Abstract

In this thesis, a 12-bit high resolution, power and area efficiency hybrid DPWM with process and temperature calibration is proposed for DPWM controller IC for DC-DC converters. The hybrid structure of DPWM combines a 6-bit differential segmented tapped delay line structure and a 6-bit counter-comparator structure, resulting in a power and area saving solution. Furthermore, the 6-bit differential segmented delay line structure serves as the clock to the high 6-bit counter-comparator structure, thus a high frequency clock is eliminated and power is significantly saved. In order to have simple delay cell and flexible delay time controllability, voltage controlled inverter is adopted to build the differential delay cell, which allows fine-tuning of the delay time. The process and temperature calibration circuit is composed of process and temperature monitors, two 2-bit flash ADCs, and a lookup table. The monitor circuits sense the process and temperature variations, and the flash ADC converts the data into digital code. The lookup table combines both the process and the temperature digital information and provides an appropriate value to the control voltage of the differential delay cell. The complete circuits design has been verified under different corners of CMOS 0.11um process technology node.